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== PLD's == | == PLD's == | ||
{{ | {{PLD_NO_ID}} | ||
|- | |- | ||
|Unlocked | |||
Converted | |||
|PAL16R4 | |||
GAL16V8 | |||
|1 | |||
|Tested | |||
|Caius | |||
|Caius | |||
|[https://wiki.pldarchive.co.uk/pals/R-Type_bootleg_PAL16R4_1.zip ZIP] | |||
|[[File:R-Type bootleg PLDs.jpg|100px]] | |||
|- | |||
|Unlocked | |||
Converted | |||
|PAL16R4 | |||
GAL16V8 | |||
|2 | |||
|Tested | |||
|Caius | |||
|Caius | |||
|[https://wiki.pldarchive.co.uk/pals/R-Type_bootleg_PAL16R4_2.zip ZIP] | |||
|[[File:R-Type bootleg PLDs.jpg|100px]] | |||
|- | |||
|Unlocked | |||
Converted | |||
|PAL16R4 | |||
GAL16V8 | |||
|3 | |||
|Tested | |||
|Caius | |||
|Caius | |||
|[https://wiki.pldarchive.co.uk/pals/R-Type_bootleg_PAL16R8_3.zip ZIP] | |||
|[[File:R-Type bootleg PLDs.jpg|100px]] | |||
|} | |} | ||
Revision as of 08:52, 4 August 2021
PCB
-
Top board
-
Middle board
-
Bottom board
PLD's
| PLD Information | Credits | Download | View | ||||
|---|---|---|---|---|---|---|---|
| Dump Method | Target Device(s) | Location | Status | Creator(s) | Tester(s) | Files | Pictures |
| Unlocked
Converted |
PAL16R4
GAL16V8 |
1 | Tested | Caius | Caius | ZIP | 
|
| Unlocked
Converted |
PAL16R4
GAL16V8 |
2 | Tested | Caius | Caius | ZIP |
|
| Unlocked
Converted |
PAL16R4
GAL16V8 |
3 | Tested | Caius | Caius | ZIP |
|
Credits
- PCB pictures from Caius
- PLD's provided by Caius