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Daystar Turbo 040 (Macintosh 68040 accelerator): Difference between revisions

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Created page with "== PCB == <gallery> File:Daystar_Turbo040_ASIC.jpg File:Turbo040_REV1_PLD.jpg </gallery> == PLD == Turbo 040 Rev 4 & Rev 5 (ASIC) {| class="wikitable" !colspan="5"|PLD Infor..."
 
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(24 intermediate revisions by 2 users not shown)
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File:Daystar_Turbo040_ASIC.jpg
File:Daystar_Turbo040_ASIC.jpg
File:Turbo040_REV1_PLD.jpg
File:Turbo040_REV1_PLD.jpg
File:Daystar_Turbo_040_40M_early.jpg
File:Daystar_Turbo_040_40M_late.jpg
File:Daystar_Turbo_cache_daughterboard.jpg
</gallery>
</gallery>


== PLD's ==


== PLD ==
=== Notes ===
Turbo 040 Rev 4 & Rev 5 (ASIC)
 
{| class="wikitable"
There are a lot of different versions of the GAL-based boards. GALs with the same ID are interchangeable between board revisions.<br>
!colspan="5"|PLD Information
IDs always seem to start with "25-". The next four digits are the actual ID.<br>
!colspan="2"|Credits
The fifths digit and any extra letters/digits that follow only seem to indicate the set of GALs to be used for the specific board version.<br>
!colspan="1"|Download
From what I was able to verify content of the GALs is identical as long as the four ID digits are the same across board versions.<br>
!colspan="1"|View
Chip speed is critical and has to match the original values. Faster chips don't work for all locations.<br>
|-
 
!Dump Method
=== Turbo 040 ASIC ===
!Target Device
{{PLD_ALL}}
!Location
!ID
!Status
!Creator(s)
!Tester(s)
!Files
!Pictures
|-
|-
|Unlocked
|Unlocked
|GAL20V8
|[[GAL20V8]]
|U10
|U10
|25-29813
|25-29813
|Tested
|Tested
|Bolle
|[[Bolle]]
|Bolle
|[[Bolle]]
|[https://wiki.pldarchive.co.uk/pals/Daystar_Turbo040_ASIC_U10.jed JEDEC]
|{{PLD|Daystar_Turbo040_ASIC_U10.zip}}
|
|{{NO IMAGE}}
|-
|-
|Unlocked
|Unlocked
|GAL20V8
|[[GAL20V8]]
|U12
|U12
|25-29820
|25-29820
|Tested
|Tested
|Bolle
|[[Bolle]]
|Bolle
|[[Bolle]]
|[https://wiki.pldarchive.co.uk/pals/Daystar_Turbo040_ASIC_U12.jed JEDEC]
|{{PLD|Daystar_Turbo040_ASIC_U12.zip}}
|
|{{NO IMAGE}}
|-
|-
|Unlocked
|Unlocked
|GAL16V8
|[[GAL16V8]]
|U23
|U23
|25-29288
|25-29288
|Tested
|Tested
|Bolle
|[[Bolle]]
|Bolle
|[[Bolle]]
|[https://wiki.pldarchive.co.uk/pals/Daystar_Turbo040_ASIC_U23.jed JEDEC]
|{{PLD|Daystar_Turbo040_ASIC_U23.zip}}
|
|{{NO IMAGE}}
|}
|}
Turbo 040 Rev 1 (PLD only)
 
{| class="wikitable"
=== Turbo 040 25MHz (early version) ===
!colspan="5"|PLD Information
{{PLD_ALL}}
!colspan="2"|Credits
!colspan="1"|Download
!colspan="1"|View
|-
!Dump Method
!Target Device
!Location
!ID
!Status
!Creator(s)
!Tester(s)
!Files
!Pictures
|-
|-
|Undumped
|Undumped
|GAL22V10
|[[GAL22V10]]
|U4
|U4
|25-2915?
|25-2915?
Line 79: Line 63:
|
|
|
|
|
|{{NO IMAGE}}
|-
|-
|Unlocked
|Glitched
|GAL20V8
|[[GAL20V8]]
|U5
|U5
|25-23613
|25-23613
|Assumed working
|Assumed working
|Bolle
|[[Bolle]]
|
|[https://wiki.pldarchive.co.uk/pals/Daystar_Turbo040_REV1_U5.jed JEDEC]
|
|
|{{PLD|Daystar_Turbo040_REV1_U5.zip}}
|{{NO IMAGE}}
|-
|-
|Unlocked
|Glitched
|GAL20V8
|[[GAL20V8]]
|U6
|U6
|25-24009
|25-24009
|Assumed working
|Assumed working
|Bolle
|[[Bolle]]
|
|[https://wiki.pldarchive.co.uk/pals/Daystar_Turbo040_REV1_U6.jed JEDEC]
|
|
|{{PLD|Daystar_Turbo040_REV1_U6.zip}}
|{{NO IMAGE}}
|-
|-
|Unlocked
|Glitched
|GAL20V8
|[[GAL20V8]]
|U7
|U7
|25-24115
|25-24115
|Assumed working
|Assumed working
|Bolle
|[[Bolle]]
|
|[https://wiki.pldarchive.co.uk/pals/Daystar_Turbo040_REV1_U7.jed JEDEC]
|
|
|{{PLD|Daystar_Turbo040_REV1_U7.zip}}
|{{NO IMAGE}}
|-
|-
|Unlocked
|Glitched
|GAL20V8
|[[GAL20V8]]
|U8
|U8
|25-24511
|25-24511
|Assumed working
|Assumed working
|Bolle
|[[Bolle]]
|
|[https://wiki.pldarchive.co.uk/pals/Daystar_Turbo040_REV1_U8.jed JEDEC]
|
|
|{{PLD|Daystar_Turbo040_REV1_U8.zip}}
|{{NO IMAGE}}
|-
|-
|Unlocked
|Glitched
|GAL20V8
|[[GAL20V8]]
|U9
|U9
|25-29288
|25-29288
|Assumed working
|Assumed working
|Bolle
|[[Bolle]]
|
|[https://wiki.pldarchive.co.uk/pals/Daystar_Turbo040_REV1_U9.jed JEDEC]
|
|
|{{PLD|Daystar_Turbo040_REV1_U9.zip}}
|{{NO IMAGE}}
|-
|-
|Undumped
|Undumped
|GAL22V10
|[[GAL22V10]]
|U10
|U10
|25-2906?
|25-2906?
Line 139: Line 123:
|
|
|
|
|
|{{NO IMAGE}}
|-
|-
|Unlocked
|Glitched
|GAL20V8
|[[GAL20V8]]
|U11
|U11
|25-23705
|25-23705
|Assumed working
|Assumed working
|Bolle
|[[Bolle]]
|
|[https://wiki.pldarchive.co.uk/pals/Daystar_Turbo040_REV1_U11.jed JEDEC]
|
|
|{{PLD|Daystar_Turbo040_REV1_U11.zip}}
|{{NO IMAGE}}
|-
|-
|Unlocked
|Glitched
|GAL20V8
|[[GAL20V8]]
|U14
|U14
|25-29288
|25-29288
|Assumed working
|Assumed working
|Bolle
|[[Bolle]]
|
|[https://wiki.pldarchive.co.uk/pals/Daystar_Turbo040_REV1_U14.jed JEDEC]
|
|
|{{PLD|Daystar_Turbo040_REV1_U14.zip}}
|{{NO IMAGE}}
|-
|-
|Undumped
|Glitched
|GAL22V10
|[[GAL22V10]]
|U15
|U15
|25-23903
|25-23903
|Assumed working
|[[Bolle]]
|
|
|
|{{PLD|Turbo040_40M_latest_GAL_U15.zip}}
|
|{{NO IMAGE}}
|
|
|-
|-
|Unlocked
|Glitched
|GAL20V8
|[[GAL20V8]]
|U16
|U16
|25-24801
|25-24801
|Assumed working
|Assumed working
|Bolle
|[[Bolle]]
|
|[https://wiki.pldarchive.co.uk/pals/Daystar_Turbo040_REV1_U16.jed JEDEC]
|
|
|{{PLD|Daystar_Turbo040_REV1_U16.zip}}
|{{NO IMAGE}}
|-
|-
|Unlocked
|Glitched
|GAL20V8
|[[GAL20V8]]
|U17
|U17
|25-24702
|25-24702
|Assumed working
|Assumed working
|Bolle
|[[Bolle]]
|
|[https://wiki.pldarchive.co.uk/pals/Daystar_Turbo040_REV1_U17.jed JEDEC]
|
|
|{{PLD|Daystar_Turbo040_REV1_U17.zip}}
|{{NO IMAGE}}
|}
=== Turbo 040 40MHz GAL-based early version ===
{{PLD_ALL}}
|-
|Glitched
|[[GAL22V10]]
|U4
|25-29391
|Tested
|[[Bolle]]
|[[Bolle]]
|[https://wiki.pldarchive.co.uk/pals/Turbo040_40M_latest_GAL_U4.zip ZIP]
|{{NO IMAGE}}
|-
|Glitched
|[[GAL20V8]]
|U5
|25-2911x
|Tested
|[[Bolle]]
|[[Bolle]]
|[https://wiki.pldarchive.co.uk/pals/Turbo040_40M_latest_GAL_U5.zip ZIP]
|{{NO IMAGE}}
|-
|Glitched
|[[GAL20V8]]
|U6
|25-2913x
|Tested
|[[Bolle]]
|[[Bolle]]
|[https://wiki.pldarchive.co.uk/pals/Turbo040_40M_early_GAL_U6.zip ZIP]
|{{NO IMAGE}}
|-
|Glitched
|[[GAL20V8]]
|U7
|25-24115
|Tested
|[[Bolle]]
|[[Bolle]]
|[https://wiki.pldarchive.co.uk/pals/Turbo040_40M_latest_GAL_U7.zip ZIP]
|{{NO IMAGE}}
|-
|Glitched
|[[GAL20V8]]
|U8
|25-2950?
|Tested
|[[Bolle]]
|[[Bolle]]
|[https://wiki.pldarchive.co.uk/pals/Turbo040_40M_latest_GAL_U8.zip ZIP]
|{{NO IMAGE}}
|-
|Glitched
|[[GAL20V8]]
|U9
|25-23804
|Tested
|[[Bolle]]
|[[Bolle]]
|[https://wiki.pldarchive.co.uk/pals/Turbo040_40M_latest_GAL_U9.zip ZIP]
|{{NO IMAGE}}
|-
|Glitched
|[[GAL20V8]]
|U10
|25-24412
|Tested
|[[Bolle]]
|[[Bolle]]
|[https://wiki.pldarchive.co.uk/pals/Turbo040_40M_latest_GAL_U10.zip ZIP]
|{{NO IMAGE}}
|-
|Glitched
|[[GAL20V8]]
|U11
|25-2912x
|Tested
|[[Bolle]]
|[[Bolle]]
|[https://wiki.pldarchive.co.uk/pals/Turbo040_40M_latest_GAL_U11.zip ZIP]
|{{NO IMAGE}}
|-
|Glitched
|[[GAL20V8]]
|U14
|25-2920x
|Tested
|[[Bolle]]
|[[Bolle]]
|[https://wiki.pldarchive.co.uk/pals/Turbo040_40M_latest_GAL_U14.zip ZIP]
|{{NO IMAGE}}
|-
|Glitched
|[[GAL22V10]]
|U15
|25-23903
|Tested
|[[Bolle]]
|[[Bolle]]
|[https://wiki.pldarchive.co.uk/pals/Turbo040_40M_latest_GAL_U15.zip ZIP]
|{{NO IMAGE}}
|-
|Glitched
|[[GAL20V8]]
|U16
|25-24801
|Tested
|[[Bolle]]
|[[Bolle]]
|[https://wiki.pldarchive.co.uk/pals/Turbo040_40M_latest_GAL_U16.zip ZIP]
|{{NO IMAGE}}
|-
|Glitched
|[[GAL20V8]]
|U17
|25-24702
|Tested
|[[Bolle]]
|[[Bolle]]
|[https://wiki.pldarchive.co.uk/pals/Turbo040_40M_latest_GAL_U17.zip ZIP]
|{{NO IMAGE}}
|}
=== Turbo 040 40MHz GAL-based latest version ===
{{PLD_ALL}}
|-
|Glitched
|[[GAL22V10]]
|U4
|25-29391
|Tested
|[[Bolle]]
|[[Bolle]]
|[https://wiki.pldarchive.co.uk/pals/Turbo040_40M_latest_GAL_U4.zip ZIP]
|{{NO IMAGE}}
|-
|Glitched
|[[GAL20V8]]
|U5
|25-29110
|Tested
|[[Bolle]]
|[[Bolle]]
|[https://wiki.pldarchive.co.uk/pals/Turbo040_40M_latest_GAL_U5.zip ZIP]
|{{NO IMAGE}}
|-
|Glitched
|[[GAL20V8]]
|U6
|25-2932x
|Tested
|[[Bolle]]
|[[Bolle]]
|[https://wiki.pldarchive.co.uk/pals/Turbo040_40M_latest_GAL_U6.zip ZIP]
|{{NO IMAGE}}
|-
|Glitched
|[[GAL20V8]]
|U7
|25-24115
|Tested
|[[Bolle]]
|[[Bolle]]
|[https://wiki.pldarchive.co.uk/pals/Turbo040_40M_latest_GAL_U7.zip ZIP]
|{{NO IMAGE}}
|-
|Glitched
|[[GAL20V8]]
|U8
|25-29509
|Tested
|[[Bolle]]
|[[Bolle]]
|[https://wiki.pldarchive.co.uk/pals/Turbo040_40M_latest_GAL_U8.zip ZIP]
|{{NO IMAGE}}
|-
|Glitched
|[[GAL20V8]]
|U9
|25-23804
|Tested
|[[Bolle]]
|[[Bolle]]
|[https://wiki.pldarchive.co.uk/pals/Turbo040_40M_latest_GAL_U9.zip ZIP]
|{{NO IMAGE}}
|-
|Glitched
|[[GAL20V8]]
|U10
|25-24412
|Tested
|[[Bolle]]
|[[Bolle]]
|[https://wiki.pldarchive.co.uk/pals/Turbo040_40M_latest_GAL_U10.zip ZIP]
|{{NO IMAGE}}
|-
|Glitched
|[[GAL20V8]]
|U11
|25-2912x
|Tested
|[[Bolle]]
|[[Bolle]]
|[https://wiki.pldarchive.co.uk/pals/Turbo040_40M_latest_GAL_U11.zip ZIP]
|{{NO IMAGE}}
|-
|Glitched
|[[GAL20V8]]
|U14
|25-29202
|Tested
|[[Bolle]]
|[[Bolle]]
|[https://wiki.pldarchive.co.uk/pals/Turbo040_40M_latest_GAL_U14.zip ZIP]
|{{NO IMAGE}}
|-
|Glitched
|[[GAL22V10]]
|U15
|25-23903
|Tested
|[[Bolle]]
|[[Bolle]]
|[https://wiki.pldarchive.co.uk/pals/Turbo040_40M_latest_GAL_U15.zip ZIP]
|{{NO IMAGE}}
|-
|Glitched
|[[GAL20V8]]
|U16
|25-24801
|Tested
|[[Bolle]]
|[[Bolle]]
|[https://wiki.pldarchive.co.uk/pals/Turbo040_40M_latest_GAL_U16.zip ZIP]
|{{NO IMAGE}}
|-
|Glitched
|[[GAL20V8]]
|U17
|25-24702
|Tested
|[[Bolle]]
|[[Bolle]]
|[https://wiki.pldarchive.co.uk/pals/Turbo040_40M_latest_GAL_U17.zip ZIP]
|{{NO IMAGE}}
|-
|Glitched
|[[GAL16V8]]
|U38
|25-29417
|Tested
|[[Bolle]]
|[[Bolle]]
|[https://wiki.pldarchive.co.uk/pals/Turbo040_40M_latest_GAL_U38.zip ZIP]
|{{NO IMAGE}}
|}
=== Turbo 040 Cache Daughterboard ===
{{PLD_ALL}}
|-
|Unlocked
|[[PAL16L8]]
|U1
|25-28205
|Tested
|[[Bolle]]
|[[Bolle]]
|[https://wiki.pldarchive.co.uk/pals/Turbo040_cache_u1.zip ZIP]
|{{NO IMAGE}}
|-
|Glitched
|[[GAL20V8]]
|U2
|25-2831x
|Tested
|[[Bolle]]
|[[Bolle]]
|[https://wiki.pldarchive.co.uk/pals/Turbo040_cache_u2.zip ZIP]
|{{NO IMAGE}}
|-
|Glitched
|[[GAL20V8]]
|U3
|25-2843x
|Tested
|[[Bolle]]
|[[Bolle]]
|[https://wiki.pldarchive.co.uk/pals/Turbo040_cache_u3.zip ZIP]
|{{NO IMAGE}}
|-
|Glitched
|[[GAL20V8]]
|U4
|25-2940x
|Tested
|[[Bolle]]
|[[Bolle]]
|[https://wiki.pldarchive.co.uk/pals/Turbo040_cache_u4.zip ZIP]
|{{NO IMAGE}}
|}
|}
[[Category:Bolle]]
[[Category:Computer]]
[[Category:Apple]]
[[Category:Macintosh]]
[[Category:Undumped]]

Latest revision as of 12:41, 18 May 2025

PCB

edit

PLD's

edit

Notes

edit

There are a lot of different versions of the GAL-based boards. GALs with the same ID are interchangeable between board revisions.
IDs always seem to start with "25-". The next four digits are the actual ID.
The fifths digit and any extra letters/digits that follow only seem to indicate the set of GALs to be used for the specific board version.
From what I was able to verify content of the GALs is identical as long as the four ID digits are the same across board versions.
Chip speed is critical and has to match the original values. Faster chips don't work for all locations.

Turbo 040 ASIC

edit
PLD Information Credits Download View
Dump Method Target Device Location ID Status Creator(s) Tester(s) Files Pictures
Unlocked GAL20V8 U10 25-29813 Tested Bolle Bolle ZIP
Unlocked GAL20V8 U12 25-29820 Tested Bolle Bolle ZIP
Unlocked GAL16V8 U23 25-29288 Tested Bolle Bolle ZIP

Turbo 040 25MHz (early version)

edit
PLD Information Credits Download View
Dump Method Target Device Location ID Status Creator(s) Tester(s) Files Pictures
Undumped GAL22V10 U4 25-2915?
Glitched GAL20V8 U5 25-23613 Assumed working Bolle ZIP
Glitched GAL20V8 U6 25-24009 Assumed working Bolle ZIP
Glitched GAL20V8 U7 25-24115 Assumed working Bolle ZIP
Glitched GAL20V8 U8 25-24511 Assumed working Bolle ZIP
Glitched GAL20V8 U9 25-29288 Assumed working Bolle ZIP
Undumped GAL22V10 U10 25-2906?
Glitched GAL20V8 U11 25-23705 Assumed working Bolle ZIP
Glitched GAL20V8 U14 25-29288 Assumed working Bolle ZIP
Glitched GAL22V10 U15 25-23903 Assumed working Bolle ZIP
Glitched GAL20V8 U16 25-24801 Assumed working Bolle ZIP
Glitched GAL20V8 U17 25-24702 Assumed working Bolle ZIP

Turbo 040 40MHz GAL-based early version

edit
PLD Information Credits Download View
Dump Method Target Device Location ID Status Creator(s) Tester(s) Files Pictures
Glitched GAL22V10 U4 25-29391 Tested Bolle Bolle ZIP
Glitched GAL20V8 U5 25-2911x Tested Bolle Bolle ZIP
Glitched GAL20V8 U6 25-2913x Tested Bolle Bolle ZIP
Glitched GAL20V8 U7 25-24115 Tested Bolle Bolle ZIP
Glitched GAL20V8 U8 25-2950? Tested Bolle Bolle ZIP
Glitched GAL20V8 U9 25-23804 Tested Bolle Bolle ZIP
Glitched GAL20V8 U10 25-24412 Tested Bolle Bolle ZIP
Glitched GAL20V8 U11 25-2912x Tested Bolle Bolle ZIP
Glitched GAL20V8 U14 25-2920x Tested Bolle Bolle ZIP
Glitched GAL22V10 U15 25-23903 Tested Bolle Bolle ZIP
Glitched GAL20V8 U16 25-24801 Tested Bolle Bolle ZIP
Glitched GAL20V8 U17 25-24702 Tested Bolle Bolle ZIP

Turbo 040 40MHz GAL-based latest version

edit
PLD Information Credits Download View
Dump Method Target Device Location ID Status Creator(s) Tester(s) Files Pictures
Glitched GAL22V10 U4 25-29391 Tested Bolle Bolle ZIP
Glitched GAL20V8 U5 25-29110 Tested Bolle Bolle ZIP
Glitched GAL20V8 U6 25-2932x Tested Bolle Bolle ZIP
Glitched GAL20V8 U7 25-24115 Tested Bolle Bolle ZIP
Glitched GAL20V8 U8 25-29509 Tested Bolle Bolle ZIP
Glitched GAL20V8 U9 25-23804 Tested Bolle Bolle ZIP
Glitched GAL20V8 U10 25-24412 Tested Bolle Bolle ZIP
Glitched GAL20V8 U11 25-2912x Tested Bolle Bolle ZIP
Glitched GAL20V8 U14 25-29202 Tested Bolle Bolle ZIP
Glitched GAL22V10 U15 25-23903 Tested Bolle Bolle ZIP
Glitched GAL20V8 U16 25-24801 Tested Bolle Bolle ZIP
Glitched GAL20V8 U17 25-24702 Tested Bolle Bolle ZIP
Glitched GAL16V8 U38 25-29417 Tested Bolle Bolle ZIP

Turbo 040 Cache Daughterboard

edit
PLD Information Credits Download View
Dump Method Target Device Location ID Status Creator(s) Tester(s) Files Pictures
Unlocked PAL16L8 U1 25-28205 Tested Bolle Bolle ZIP
Glitched GAL20V8 U2 25-2831x Tested Bolle Bolle ZIP
Glitched GAL20V8 U3 25-2843x Tested Bolle Bolle ZIP
Glitched GAL20V8 U4 25-2940x Tested Bolle Bolle ZIP
Retrieved from "https://wiki.pldarchive.co.uk/index.php?title=Daystar_Turbo_040_(Macintosh_68040_accelerator)&oldid=26831"