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Daystar Turbo 040 (Macintosh 68040 accelerator): Difference between revisions

From PLD Archive
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Line 3: Line 3:
File:Daystar_Turbo040_ASIC.jpg
File:Daystar_Turbo040_ASIC.jpg
File:Turbo040_REV1_PLD.jpg
File:Turbo040_REV1_PLD.jpg
File:Daystar_Turbo_040_40M_early.jpg
File:Daystar_Turbo_040_40M_late.jpg
File:Daystar_Turbo_cache_daughterboard.jpg
</gallery>
</gallery>


== PLD's ==
=== Notes ===
There are a lot of different versions of the GAL-based boards. GALs with the same ID are interchangeable between board revisions.<br>
IDs always seem to start with "25-". The next four digits are the actual ID.<br>
The fifths digit and any extra letters/digits that follow only seem to indicate the set of GALs to be used for the specific board version.<br>
From what I was able to verify content of the GALs is identical as long as the four ID digits are the same across board versions.<br>
Chip speed is critical and has to match the original values. Faster chips don't work for all locations.<br>


== PLD's ==
=== Turbo 040 ASIC ===
=== Turbo 040 ASIC ===
{{PLD_ALL}}
{{PLD_ALL}}
Line 17: Line 28:
|[[Bolle]]
|[[Bolle]]
|[[Bolle]]
|[[Bolle]]
|[https://wiki.pldarchive.co.uk/pals/Daystar_Turbo040_ASIC_U10.jed JEDEC]
|{{PLD|Daystar_Turbo040_ASIC_U10.zip}}
|
|{{NO IMAGE}}
|-
|-
|Unlocked
|Unlocked
Line 27: Line 38:
|[[Bolle]]
|[[Bolle]]
|[[Bolle]]
|[[Bolle]]
|[https://wiki.pldarchive.co.uk/pals/Daystar_Turbo040_ASIC_U12.jed JEDEC]
|{{PLD|Daystar_Turbo040_ASIC_U12.zip}}
|
|{{NO IMAGE}}
|-
|-
|Unlocked
|Unlocked
Line 37: Line 48:
|[[Bolle]]
|[[Bolle]]
|[[Bolle]]
|[[Bolle]]
|[https://wiki.pldarchive.co.uk/pals/Daystar_Turbo040_ASIC_U23.jed JEDEC]
|{{PLD|Daystar_Turbo040_ASIC_U23.zip}}
|
|{{NO IMAGE}}
|}
|}


Line 52: Line 63:
|
|
|
|
|
|{{NO IMAGE}}
|-
|-
|Unlocked
|Glitched
|[[GAL20V8]]
|[[GAL20V8]]
|U5
|U5
Line 61: Line 72:
|[[Bolle]]
|[[Bolle]]
|
|
|[https://wiki.pldarchive.co.uk/pals/Daystar_Turbo040_REV1_U5.jed JEDEC]
|{{PLD|Daystar_Turbo040_REV1_U5.zip}}
|
|{{NO IMAGE}}
|-
|-
|Unlocked
|Glitched
|[[GAL20V8]]
|[[GAL20V8]]
|U6
|U6
Line 71: Line 82:
|[[Bolle]]
|[[Bolle]]
|
|
|[https://wiki.pldarchive.co.uk/pals/Daystar_Turbo040_REV1_U6.jed JEDEC]
|{{PLD|Daystar_Turbo040_REV1_U6.zip}}
|
|{{NO IMAGE}}
|-
|-
|Unlocked
|Glitched
|[[GAL20V8]]
|[[GAL20V8]]
|U7
|U7
Line 81: Line 92:
|[[Bolle]]
|[[Bolle]]
|
|
|[https://wiki.pldarchive.co.uk/pals/Daystar_Turbo040_REV1_U7.jed JEDEC]
|{{PLD|Daystar_Turbo040_REV1_U7.zip}}
|
|{{NO IMAGE}}
|-
|-
|Unlocked
|Glitched
|[[GAL20V8]]
|[[GAL20V8]]
|U8
|U8
Line 91: Line 102:
|[[Bolle]]
|[[Bolle]]
|
|
|[https://wiki.pldarchive.co.uk/pals/Daystar_Turbo040_REV1_U8.jed JEDEC]
|{{PLD|Daystar_Turbo040_REV1_U8.zip}}
|
|{{NO IMAGE}}
|-
|-
|Unlocked
|Glitched
|[[GAL20V8]]
|[[GAL20V8]]
|U9
|U9
Line 101: Line 112:
|[[Bolle]]
|[[Bolle]]
|
|
|[https://wiki.pldarchive.co.uk/pals/Daystar_Turbo040_REV1_U9.jed JEDEC]
|{{PLD|Daystar_Turbo040_REV1_U9.zip}}
|
|{{NO IMAGE}}
|-
|-
|Undumped
|Undumped
Line 112: Line 123:
|
|
|
|
|
|{{NO IMAGE}}
|-
|-
|Unlocked
|Glitched
|[[GAL20V8]]
|[[GAL20V8]]
|U11
|U11
Line 121: Line 132:
|[[Bolle]]
|[[Bolle]]
|
|
|[https://wiki.pldarchive.co.uk/pals/Daystar_Turbo040_REV1_U11.jed JEDEC]
|{{PLD|Daystar_Turbo040_REV1_U11.zip}}
|
|{{NO IMAGE}}
|-
|-
|Unlocked
|Glitched
|[[GAL20V8]]
|[[GAL20V8]]
|U14
|U14
Line 131: Line 142:
|[[Bolle]]
|[[Bolle]]
|
|
|[https://wiki.pldarchive.co.uk/pals/Daystar_Turbo040_REV1_U14.jed JEDEC]
|{{PLD|Daystar_Turbo040_REV1_U14.zip}}
|
|{{NO IMAGE}}
|-
|-
|Undumped
|Glitched
|[[GAL22V10]]
|[[GAL22V10]]
|U15
|U15
|25-23903
|25-23903
|Assumed working
|[[Bolle]]
|
|
|
|{{PLD|Turbo040_40M_latest_GAL_U15.zip}}
|
|{{NO IMAGE}}
|
|
|-
|-
|Unlocked
|Glitched
|[[GAL20V8]]
|[[GAL20V8]]
|U16
|U16
Line 151: Line 162:
|[[Bolle]]
|[[Bolle]]
|
|
|[https://wiki.pldarchive.co.uk/pals/Daystar_Turbo040_REV1_U16.jed JEDEC]
|{{PLD|Daystar_Turbo040_REV1_U16.zip}}
|
|{{NO IMAGE}}
|-
|-
|Unlocked
|Glitched
|[[GAL20V8]]
|[[GAL20V8]]
|U17
|U17
Line 161: Line 172:
|[[Bolle]]
|[[Bolle]]
|
|
|[https://wiki.pldarchive.co.uk/pals/Daystar_Turbo040_REV1_U17.jed JEDEC]
|{{PLD|Daystar_Turbo040_REV1_U17.zip}}
|
|{{NO IMAGE}}
|}
|}


Line 168: Line 179:
{{PLD_ALL}}
{{PLD_ALL}}
|-
|-
|Undumped
|Glitched
|[[GAL22V10]]
|[[GAL22V10]]
|U4
|U4
|25-2939?
|25-29391
|
|Tested
|
|[[Bolle]]
|
|[[Bolle]]
|
|[https://wiki.pldarchive.co.uk/pals/Turbo040_40M_latest_GAL_U4.zip ZIP]
|
|{{NO IMAGE}}
|-
|-
|Glitched
|Glitched
Line 182: Line 193:
|U5
|U5
|25-2911x
|25-2911x
|Assumed working
|Tested
|[[Bolle]]
|[[Bolle]]
|[[Bolle]]
|
|[https://wiki.pldarchive.co.uk/pals/Turbo040_40M_latest_GAL_U5.zip ZIP]
|[https://wiki.pldarchive.co.uk/pals/Daystar_Turbo040_REV1_U5.jed JEDEC]
|{{NO IMAGE}}
|
|-
|-
|Glitched
|Glitched
Line 192: Line 203:
|U6
|U6
|25-2913x
|25-2913x
|Assumed working
|Tested
|[[Bolle]]
|[[Bolle]]
|[[Bolle]]
|
|[https://wiki.pldarchive.co.uk/pals/Turbo040_40M_early_GAL_U6.zip ZIP]
|[https://wiki.pldarchive.co.uk/pals/Daystar_Turbo040_REV1_U6.jed JEDEC]
|{{NO IMAGE}}
|
|-
|-
|Glitched
|Glitched
Line 202: Line 213:
|U7
|U7
|25-24115
|25-24115
|Assumed working
|Tested
|[[Bolle]]
|[[Bolle]]
|[[Bolle]]
|
|[https://wiki.pldarchive.co.uk/pals/Turbo040_40M_latest_GAL_U7.zip ZIP]
|[https://wiki.pldarchive.co.uk/pals/Daystar_Turbo040_REV1_U7.jed JEDEC]
|{{NO IMAGE}}
|
|-
|-
|Glitched
|Glitched
Line 212: Line 223:
|U8
|U8
|25-2950?
|25-2950?
|Assumed working
|Tested
|[[Bolle]]
|[[Bolle]]
|[[Bolle]]
|
|[https://wiki.pldarchive.co.uk/pals/Turbo040_40M_latest_GAL_U8.zip ZIP]
|[https://wiki.pldarchive.co.uk/pals/Daystar_Turbo040_REV1_U8.jed JEDEC]
|{{NO IMAGE}}
|
|-
|-
|Glitched
|Glitched
Line 222: Line 233:
|U9
|U9
|25-23804
|25-23804
|Assumed working
|Tested
|[[Bolle]]
|[[Bolle]]
|[[Bolle]]
|
|[https://wiki.pldarchive.co.uk/pals/Turbo040_40M_latest_GAL_U9.zip ZIP]
|[https://wiki.pldarchive.co.uk/pals/Daystar_Turbo040_REV1_U9.jed JEDEC]
|{{NO IMAGE}}
|
|-
|-
|Glitched
|Glitched
Line 232: Line 243:
|U10
|U10
|25-24412
|25-24412
|Assumed working
|Tested
|[[Bolle]]
|[[Bolle]]
|[[Bolle]]
|
|[https://wiki.pldarchive.co.uk/pals/Turbo040_40M_latest_GAL_U10.zip ZIP]
|[https://wiki.pldarchive.co.uk/pals/Daystar_Turbo040_REV1_U9.jed JEDEC]
|{{NO IMAGE}}
|
|-
|-
|Glitched
|Glitched
Line 242: Line 253:
|U11
|U11
|25-2912x
|25-2912x
|Assumed working
|Tested
|[[Bolle]]
|[[Bolle]]
|[[Bolle]]
|
|[https://wiki.pldarchive.co.uk/pals/Turbo040_40M_latest_GAL_U11.zip ZIP]
|[https://wiki.pldarchive.co.uk/pals/Daystar_Turbo040_REV1_U11.jed JEDEC]
|{{NO IMAGE}}
|
|-
|-
|Glitched
|Glitched
Line 252: Line 263:
|U14
|U14
|25-2920x
|25-2920x
|Assumed working
|Tested
|[[Bolle]]
|[[Bolle]]
|[[Bolle]]
|
|[https://wiki.pldarchive.co.uk/pals/Turbo040_40M_latest_GAL_U14.zip ZIP]
|[https://wiki.pldarchive.co.uk/pals/Daystar_Turbo040_REV1_U14.jed JEDEC]
|{{NO IMAGE}}
|
|-
|-
|Glitched
|Glitched
Line 262: Line 273:
|U15
|U15
|25-23903
|25-23903
|Assumed working
|Tested
|[[Bolle]]
|[[Bolle]]
|[[Bolle]]
|
|[https://wiki.pldarchive.co.uk/pals/Turbo040_40M_latest_GAL_U15.zip ZIP]
|[https://wiki.pldarchive.co.uk/pals/Daystar_Turbo040_REV1_U14.jed JEDEC]
|{{NO IMAGE}}
|
|-
|-
|Glitched
|Glitched
Line 272: Line 283:
|U16
|U16
|25-24801
|25-24801
|Assumed working
|Tested
|[[Bolle]]
|[[Bolle]]
|[[Bolle]]
|
|[https://wiki.pldarchive.co.uk/pals/Turbo040_40M_latest_GAL_U16.zip ZIP]
|[https://wiki.pldarchive.co.uk/pals/Daystar_Turbo040_REV1_U16.jed JEDEC]
|{{NO IMAGE}}
|
|-
|-
|Glitched
|Glitched
Line 282: Line 293:
|U17
|U17
|25-24702
|25-24702
|Assumed working
|Tested
|[[Bolle]]
|[[Bolle]]
|[[Bolle]]
|
|[https://wiki.pldarchive.co.uk/pals/Turbo040_40M_latest_GAL_U17.zip ZIP]
|[https://wiki.pldarchive.co.uk/pals/Daystar_Turbo040_REV1_U17.jed JEDEC]
|{{NO IMAGE}}
|
|}
|}


Line 292: Line 303:
{{PLD_ALL}}
{{PLD_ALL}}
|-
|-
|Undumped
|Glitched
|[[GAL22V10]]
|[[GAL22V10]]
|U4
|U4
|25-29391
|25-29391
|
|Tested
|
|[[Bolle]]
|
|[[Bolle]]
|
|[https://wiki.pldarchive.co.uk/pals/Turbo040_40M_latest_GAL_U4.zip ZIP]
|
|{{NO IMAGE}}
|-
|-
|Glitched
|Glitched
Line 306: Line 317:
|U5
|U5
|25-29110
|25-29110
|Assumed working
|Tested
|[[Bolle]]
|[[Bolle]]
|[[Bolle]]
|
|[https://wiki.pldarchive.co.uk/pals/Turbo040_40M_latest_GAL_U5.zip ZIP]
|[https://wiki.pldarchive.co.uk/pals/Turbo040_40M_latest_GAL_U5.jed.zip ZIP]
|{{NO IMAGE}}
|
|-
|-
|Glitched
|Glitched
Line 316: Line 327:
|U6
|U6
|25-2932x
|25-2932x
|Assumed working
|Tested
|[[Bolle]]
|[[Bolle]]
|[[Bolle]]
|
|[https://wiki.pldarchive.co.uk/pals/Turbo040_40M_latest_GAL_U6.zip ZIP]
|[https://wiki.pldarchive.co.uk/pals/Turbo040_40M_latest_GAL_U6.jed.zip JEDEC]
|{{NO IMAGE}}
|
|-
|-
|Glitched
|Glitched
Line 326: Line 337:
|U7
|U7
|25-24115
|25-24115
|Assumed working
|Tested
|[[Bolle]]
|[[Bolle]]
|[[Bolle]]
|
|[https://wiki.pldarchive.co.uk/pals/Turbo040_40M_latest_GAL_U7.zip ZIP]
|[https://wiki.pldarchive.co.uk/pals/Turbo040_40M_latest_GAL_U7.jed.zip JEDEC]
|{{NO IMAGE}}
|
|-
|-
|Glitched
|Glitched
Line 336: Line 347:
|U8
|U8
|25-29509
|25-29509
|Assumed working
|Tested
|[[Bolle]]
|[[Bolle]]
|[[Bolle]]
|
|[https://wiki.pldarchive.co.uk/pals/Turbo040_40M_latest_GAL_U8.zip ZIP]
|[https://wiki.pldarchive.co.uk/pals/Turbo040_40M_latest_GAL_U8.jed.zip JEDEC]
|{{NO IMAGE}}
|
|-
|-
|Glitched
|Glitched
Line 346: Line 357:
|U9
|U9
|25-23804
|25-23804
|Assumed working
|Tested
|[[Bolle]]
|[[Bolle]]
|[[Bolle]]
|
|[https://wiki.pldarchive.co.uk/pals/Turbo040_40M_latest_GAL_U9.zip ZIP]
|[https://wiki.pldarchive.co.uk/pals/Turbo040_40M_latest_GAL_U9.jed.zip JEDEC]
|{{NO IMAGE}}
|
|-
|-
|Glitched
|Glitched
Line 356: Line 367:
|U10
|U10
|25-24412
|25-24412
|Assumed working
|Tested
|[[Bolle]]
|[[Bolle]]
|[[Bolle]]
|
|[https://wiki.pldarchive.co.uk/pals/Turbo040_40M_latest_GAL_U10.zip ZIP]
|[https://wiki.pldarchive.co.uk/pals/Turbo040_40M_latest_GAL_U10.jed.zip JEDEC]
|{{NO IMAGE}}
|
|-
|-
|Glitched
|Glitched
Line 366: Line 377:
|U11
|U11
|25-2912x
|25-2912x
|Assumed working
|Tested
|[[Bolle]]
|[[Bolle]]
|[[Bolle]]
|
|[https://wiki.pldarchive.co.uk/pals/Turbo040_40M_latest_GAL_U11.zip ZIP]
|[https://wiki.pldarchive.co.uk/pals/Turbo040_40M_latest_GAL_U11.jed.zip JEDEC]
|{{NO IMAGE}}
|
|-
|-
|Glitched
|Glitched
Line 376: Line 387:
|U14
|U14
|25-29202
|25-29202
|Assumed working
|Tested
|[[Bolle]]
|[[Bolle]]
|[[Bolle]]
|
|[https://wiki.pldarchive.co.uk/pals/Turbo040_40M_latest_GAL_U14.zip ZIP]
|[https://wiki.pldarchive.co.uk/pals/Turbo040_40M_latest_GAL_U14.jed.zip JEDEC]
|{{NO IMAGE}}
|
|-
|-
|Glitched
|Glitched
Line 386: Line 397:
|U15
|U15
|25-23903
|25-23903
|Assumed working
|Tested
|[[Bolle]]
|[[Bolle]]
|[[Bolle]]
|
|[https://wiki.pldarchive.co.uk/pals/Turbo040_40M_latest_GAL_U15.zip ZIP]
|[https://wiki.pldarchive.co.uk/pals/Turbo040_40M_latest_GAL_U15.jed.zip JEDEC]
|{{NO IMAGE}}
|
|-
|-
|Glitched
|Glitched
Line 396: Line 407:
|U16
|U16
|25-24801
|25-24801
|Assumed working
|Tested
|[[Bolle]]
|[[Bolle]]
|[[Bolle]]
|
|[https://wiki.pldarchive.co.uk/pals/Turbo040_40M_latest_GAL_U16.zip ZIP]
|[https://wiki.pldarchive.co.uk/pals/Turbo040_40M_latest_GAL_U16.jed.zip JEDEC]
|{{NO IMAGE}}
|
|-
|-
|Glitched
|Glitched
Line 406: Line 417:
|U17
|U17
|25-24702
|25-24702
|Assumed working
|Tested
|[[Bolle]]
|[[Bolle]]
|[[Bolle]]
|
|[https://wiki.pldarchive.co.uk/pals/Turbo040_40M_latest_GAL_U17.zip ZIP]
|[https://wiki.pldarchive.co.uk/pals/Turbo040_40M_latest_GAL_U17.jed.zip JEDEC]
|{{NO IMAGE}}
|
|-
|-
|Glitched
|Glitched
Line 416: Line 427:
|U38
|U38
|25-29417
|25-29417
|Assumed working
|Tested
|[[Bolle]]
|[[Bolle]]
|[https://wiki.pldarchive.co.uk/pals/Turbo040_40M_latest_GAL_U38.zip ZIP]
|{{NO IMAGE}}
|}
 
=== Turbo 040 Cache Daughterboard ===
{{PLD_ALL}}
|-
|Unlocked
|[[PAL16L8]]
|U1
|25-28205
|Tested
|[[Bolle]]
|[[Bolle]]
|[https://wiki.pldarchive.co.uk/pals/Turbo040_cache_u1.zip ZIP]
|{{NO IMAGE}}
|-
|Glitched
|[[GAL20V8]]
|U2
|25-2831x
|Tested
|[[Bolle]]
|[[Bolle]]
|[https://wiki.pldarchive.co.uk/pals/Turbo040_cache_u2.zip ZIP]
|{{NO IMAGE}}
|-
|Glitched
|[[GAL20V8]]
|U3
|25-2843x
|Tested
|[[Bolle]]
|[[Bolle]]
|[https://wiki.pldarchive.co.uk/pals/Turbo040_cache_u3.zip ZIP]
|{{NO IMAGE}}
|-
|Glitched
|[[GAL20V8]]
|U4
|25-2940x
|Tested
|[[Bolle]]
|[[Bolle]]
|[[Bolle]]
|
|[https://wiki.pldarchive.co.uk/pals/Turbo040_cache_u4.zip ZIP]
|[https://wiki.pldarchive.co.uk/pals/Turbo040_40M_latest_GAL_U38.jed.zip JEDEC]
|{{NO IMAGE}}
|
|}
|}


[[Category:Bolle]]
[[Category:Computer]]
[[Category:Computer]]
[[Category:Apple]]
[[Category:Macintosh]]
[[Category:Undumped]]
[[Category:Undumped]]

Latest revision as of 12:41, 18 May 2025

PCB

edit

PLD's

edit

Notes

edit

There are a lot of different versions of the GAL-based boards. GALs with the same ID are interchangeable between board revisions.
IDs always seem to start with "25-". The next four digits are the actual ID.
The fifths digit and any extra letters/digits that follow only seem to indicate the set of GALs to be used for the specific board version.
From what I was able to verify content of the GALs is identical as long as the four ID digits are the same across board versions.
Chip speed is critical and has to match the original values. Faster chips don't work for all locations.

Turbo 040 ASIC

edit
PLD Information Credits Download View
Dump Method Target Device Location ID Status Creator(s) Tester(s) Files Pictures
Unlocked GAL20V8 U10 25-29813 Tested Bolle Bolle ZIP
Unlocked GAL20V8 U12 25-29820 Tested Bolle Bolle ZIP
Unlocked GAL16V8 U23 25-29288 Tested Bolle Bolle ZIP

Turbo 040 25MHz (early version)

edit
PLD Information Credits Download View
Dump Method Target Device Location ID Status Creator(s) Tester(s) Files Pictures
Undumped GAL22V10 U4 25-2915?
Glitched GAL20V8 U5 25-23613 Assumed working Bolle ZIP
Glitched GAL20V8 U6 25-24009 Assumed working Bolle ZIP
Glitched GAL20V8 U7 25-24115 Assumed working Bolle ZIP
Glitched GAL20V8 U8 25-24511 Assumed working Bolle ZIP
Glitched GAL20V8 U9 25-29288 Assumed working Bolle ZIP
Undumped GAL22V10 U10 25-2906?
Glitched GAL20V8 U11 25-23705 Assumed working Bolle ZIP
Glitched GAL20V8 U14 25-29288 Assumed working Bolle ZIP
Glitched GAL22V10 U15 25-23903 Assumed working Bolle ZIP
Glitched GAL20V8 U16 25-24801 Assumed working Bolle ZIP
Glitched GAL20V8 U17 25-24702 Assumed working Bolle ZIP

Turbo 040 40MHz GAL-based early version

edit
PLD Information Credits Download View
Dump Method Target Device Location ID Status Creator(s) Tester(s) Files Pictures
Glitched GAL22V10 U4 25-29391 Tested Bolle Bolle ZIP
Glitched GAL20V8 U5 25-2911x Tested Bolle Bolle ZIP
Glitched GAL20V8 U6 25-2913x Tested Bolle Bolle ZIP
Glitched GAL20V8 U7 25-24115 Tested Bolle Bolle ZIP
Glitched GAL20V8 U8 25-2950? Tested Bolle Bolle ZIP
Glitched GAL20V8 U9 25-23804 Tested Bolle Bolle ZIP
Glitched GAL20V8 U10 25-24412 Tested Bolle Bolle ZIP
Glitched GAL20V8 U11 25-2912x Tested Bolle Bolle ZIP
Glitched GAL20V8 U14 25-2920x Tested Bolle Bolle ZIP
Glitched GAL22V10 U15 25-23903 Tested Bolle Bolle ZIP
Glitched GAL20V8 U16 25-24801 Tested Bolle Bolle ZIP
Glitched GAL20V8 U17 25-24702 Tested Bolle Bolle ZIP

Turbo 040 40MHz GAL-based latest version

edit
PLD Information Credits Download View
Dump Method Target Device Location ID Status Creator(s) Tester(s) Files Pictures
Glitched GAL22V10 U4 25-29391 Tested Bolle Bolle ZIP
Glitched GAL20V8 U5 25-29110 Tested Bolle Bolle ZIP
Glitched GAL20V8 U6 25-2932x Tested Bolle Bolle ZIP
Glitched GAL20V8 U7 25-24115 Tested Bolle Bolle ZIP
Glitched GAL20V8 U8 25-29509 Tested Bolle Bolle ZIP
Glitched GAL20V8 U9 25-23804 Tested Bolle Bolle ZIP
Glitched GAL20V8 U10 25-24412 Tested Bolle Bolle ZIP
Glitched GAL20V8 U11 25-2912x Tested Bolle Bolle ZIP
Glitched GAL20V8 U14 25-29202 Tested Bolle Bolle ZIP
Glitched GAL22V10 U15 25-23903 Tested Bolle Bolle ZIP
Glitched GAL20V8 U16 25-24801 Tested Bolle Bolle ZIP
Glitched GAL20V8 U17 25-24702 Tested Bolle Bolle ZIP
Glitched GAL16V8 U38 25-29417 Tested Bolle Bolle ZIP

Turbo 040 Cache Daughterboard

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PLD Information Credits Download View
Dump Method Target Device Location ID Status Creator(s) Tester(s) Files Pictures
Unlocked PAL16L8 U1 25-28205 Tested Bolle Bolle ZIP
Glitched GAL20V8 U2 25-2831x Tested Bolle Bolle ZIP
Glitched GAL20V8 U3 25-2843x Tested Bolle Bolle ZIP
Glitched GAL20V8 U4 25-2940x Tested Bolle Bolle ZIP
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