ABI ICT-24: Difference between revisions
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== Pictures == | == Pictures == | ||
<gallery> | <gallery> | ||
File:ICT-24 unit.jpg | |||
File:ICT-24 pcb.jpg | |||
</gallery> | |||
== Documents == | |||
<gallery> | |||
File:ABI Digital IC Tester Product Description.pdf|Product Description | |||
File:ABI Digital IC Tester Operators Manual.pdf|Operators Manual | |||
File:ICT-24 schematic.pdf|Partial Schematics | |||
</gallery> | </gallery> | ||
== Firmware == | == Firmware == | ||
{ | {{FIRMWARE}} | ||
|- | |- | ||
|v2-5-12 | |v2-5-12 | ||
|[[ | |[[Backflipper]] | ||
|[[:File:ICT24 2-5-12.zip|ZIP]] | |[[:File:ICT24 2-5-12.zip|ZIP]] | ||
|- | |||
|v5-2-12 | |||
|[[Porchy]] | |||
|[[:File:ICT24 5-2-12.zip|ZIP]] | |||
|- | |- | ||
|v5-9-12 | |v5-9-12 | ||
Line 45: | Line 35: | ||
|[[:File:ICT24 6-1-12.zip|ZIP]] | |[[:File:ICT24 6-1-12.zip|ZIP]] | ||
|} | |} | ||
== Technical Information == | |||
=== Memory Map === | |||
<pre> | |||
$0000-$3fff – ROM1 | |||
$4000-$7fff – ROM2 | |||
$8000-$87ff – RAM | |||
8255 (IC1) | |||
$c000 – PORTA | |||
$c001 – PORTB | |||
$c002 – PORTC | |||
$c003 – Control | |||
8255 (IC2) | |||
$c004 – PORTA | |||
$c005 – PORTB | |||
$c006 – PORTC | |||
$c007 – Control | |||
8255 (IC3) | |||
$c008 – PORTA | |||
$c009 – PORTB | |||
$c00a – PORTC | |||
$c00b – Control | |||
8279 (IC8) | |||
$c00c – Data | |||
$c00d – Control | |||
IC1 – Controls the /OE lines to all the IO buffers | |||
IC2 – Controls the inputs the the IO buffers | |||
IC3 – Controls the reading from the ZIF sockets | |||
</pre> | |||
=== Fault Codes === | |||
<pre> | |||
Fault 0: | |||
One of the IO’s is tied to GND. | |||
The software tristates all the IO pins via IC1 (8522) and reads them back via IC3 (8522). They are held at logic HIGH via a pull up resistor network. If any pins are low this will result in FAULT 0. | |||
Fault 1: | |||
One of the IO’s on PORTA is tied to VCC. | |||
The software sets all of the IO pins on PORTA to logic LOW and reads the states back. If any pins are found to be logic HIGH on PORTA then this will result in FAULT 1. | |||
Fault 2: | |||
One of the IO’s on PORTB is tied to VCC. | |||
The software sets all of the IO pins on PORTB to logic LOW and reads the states back. If any pins are found to be logic HIGH on PORTB then this will result in FAULT 2. | |||
Fault 3: | |||
One of the IO’s on PORTC is tied to VCC. | |||
The software sets all of the IO pins on PORTC to logic LOW and reads the states back. If any pins are found to be logic HIGH on PORTC then this will result in FAULT 3. | |||
NOTE: The 2 uppermost bits on PORTC are not used for reading back IO lines. | |||
Fault 4: | |||
Fault with the program RAM. | |||
Fault 5: | |||
Fault with display RAM. | |||
RAM should be 0x0. If it is not then FAULT 5 with be displayed. | |||
Fault 6: | |||
Fault with display RAM. | |||
RAM should be filled with alternating 0x55 0xAA. If these values are not correct then FAULT 6 is displayed. | |||
</pre> | |||
[[Category:Backflipper]] | |||
[[Category:Equites]] | |||
[[Category:Porchy]] | |||
[[Category:mr2940]] | |||
[[Category:Equipment]] | |||
[[Category:ABI Electronics]] |
Latest revision as of 11:55, 5 May 2025
Pictures
editDocuments
edit-
Product Description
-
Operators Manual
-
Partial Schematics
Firmware
editResource | Credit | Download |
---|---|---|
v2-5-12 | Backflipper | ZIP |
v5-2-12 | Porchy | ZIP |
v5-9-12 | Equites | ZIP |
v6-0-12 | Porchy | ZIP |
v6-1-12 | mr2940 | ZIP |
Technical Information
editMemory Map
edit$0000-$3fff – ROM1 $4000-$7fff – ROM2 $8000-$87ff – RAM 8255 (IC1) $c000 – PORTA $c001 – PORTB $c002 – PORTC $c003 – Control 8255 (IC2) $c004 – PORTA $c005 – PORTB $c006 – PORTC $c007 – Control 8255 (IC3) $c008 – PORTA $c009 – PORTB $c00a – PORTC $c00b – Control 8279 (IC8) $c00c – Data $c00d – Control IC1 – Controls the /OE lines to all the IO buffers IC2 – Controls the inputs the the IO buffers IC3 – Controls the reading from the ZIF sockets
Fault Codes
editFault 0: One of the IO’s is tied to GND. The software tristates all the IO pins via IC1 (8522) and reads them back via IC3 (8522). They are held at logic HIGH via a pull up resistor network. If any pins are low this will result in FAULT 0. Fault 1: One of the IO’s on PORTA is tied to VCC. The software sets all of the IO pins on PORTA to logic LOW and reads the states back. If any pins are found to be logic HIGH on PORTA then this will result in FAULT 1. Fault 2: One of the IO’s on PORTB is tied to VCC. The software sets all of the IO pins on PORTB to logic LOW and reads the states back. If any pins are found to be logic HIGH on PORTB then this will result in FAULT 2. Fault 3: One of the IO’s on PORTC is tied to VCC. The software sets all of the IO pins on PORTC to logic LOW and reads the states back. If any pins are found to be logic HIGH on PORTC then this will result in FAULT 3. NOTE: The 2 uppermost bits on PORTC are not used for reading back IO lines. Fault 4: Fault with the program RAM. Fault 5: Fault with display RAM. RAM should be 0x0. If it is not then FAULT 5 with be displayed. Fault 6: Fault with display RAM. RAM should be filled with alternating 0x55 0xAA. If these values are not correct then FAULT 6 is displayed.