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Revision as of 17:09, 19 February 2021
PCB
PLD's
PLD Information | Credits | Download | View | |||||
---|---|---|---|---|---|---|---|---|
Dump Method | Target Device | Location | ID | Status | Creator(s) | Tester(s) | Files | Pictures |
Bruteforced | GAL20V8 | PAL1 | Tested | Caius | Caius | JEDEC | ||
Bruteforced | GAL20V8 | PAL2 | Tested | Caius | Caius | JEDEC | ||
Bruteforced | GAL20V8 | PAL3 | Tested | Caius | Caius | JEDEC | ||
Bruteforced | GAL16V8 | PAL4 | Assumed working | McTedson | JEDEC | |||
Bruteforced | GAL16V8 | PAL5 | Tested | Caius | Caius | JEDEC | ||
Bruteforced | GAL16V8 | PAL6 | Tested | Caius | Caius | JEDEC |
Credits
- PCB picture from McTedson