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Line 10: | Line 10: | ||
|[[PAL16R4]]</br>[[GAL16V8]] | |[[PAL16R4]]</br>[[GAL16V8]] | ||
|A7 | |A7 | ||
| | |||
|Tested | |Tested | ||
|[[MAME]]</br>[[Caius]] | |[[MAME]]</br>[[Caius]] | ||
Line 19: | Line 20: | ||
|[[PAL16R6]]</br>[[GAL16V8]] | |[[PAL16R6]]</br>[[GAL16V8]] | ||
|G9 | |G9 | ||
| | |||
|Tested | |Tested | ||
|[[MAME]]</br>[[Caius]] | |[[MAME]]</br>[[Caius]] | ||
Line 28: | Line 30: | ||
|[[PAL16L8]]</br>[[GAL16V8]] | |[[PAL16L8]]</br>[[GAL16V8]] | ||
|K4 | |K4 | ||
| | |||
|Tested | |Tested | ||
|[[MAME]]</br>[[Caius]] | |[[MAME]]</br>[[Caius]] | ||
Line 37: | Line 40: | ||
|[[PAL16L8]]</br>[[GAL16V8]] | |[[PAL16L8]]</br>[[GAL16V8]] | ||
|K8 | |K8 | ||
| | |||
|Tested | |Tested | ||
|[[MAME]]</br>[[Caius]] | |[[MAME]]</br>[[Caius]] |
Latest revision as of 11:27, 4 May 2025
PCB[edit]
PLD's[edit]
PLD Information | Credits | Download | View | |||||
---|---|---|---|---|---|---|---|---|
Dump Method | Target Device(s) | Location | Info | Status | Creator(s) | Tester(s) | Files | Pictures |
Unlocked Converted |
PAL16R4 GAL16V8 |
A7 | Tested | MAME Caius |
Caius | ZIP | ![]() | |
Unlocked Converted |
PAL16R6 GAL16V8 |
G9 | Tested | MAME Caius |
Caius | ZIP | ![]() | |
Unlocked Converted |
PAL16L8 GAL16V8 |
K4 | Tested | MAME Caius |
Caius | ZIP | ![]() | |
Unlocked Converted |
PAL16L8 GAL16V8 |
K8 | Tested | MAME Caius |
Caius | ZIP | ![]() |