Difference between revisions of "Syvalion (prototype)"
From
(→PLD's) |
(→PLD's) |
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Line 4: | Line 4: | ||
|Unlocked | |Unlocked | ||
|PAL20L10 | |PAL20L10 | ||
|[[Syvalion_(prototype) | |IC38 | ||
|[[Syvalion_(prototype)_CPU1|CPU1]] | |||
|Assumed working | |Assumed working | ||
|Porchy | |Porchy | ||
Line 14: | Line 14: | ||
|Unlocked | |Unlocked | ||
|PAL20L8 | |PAL20L8 | ||
|[[Syvalion_(prototype) | |IC39 | ||
|[[Syvalion_(prototype)_CPU2|CPU2]] | |||
|Assumed working | |Assumed working | ||
|Porchy | |Porchy |
Revision as of 15:42, 18 April 2022
PLD's
PLD Information | Credits | Download | View | |||||
---|---|---|---|---|---|---|---|---|
Dump Method | Target Device | Location | ID | Status | Creator(s) | Tester(s) | Files | Pictures |
Unlocked | PAL20L10 | IC38 | CPU1 | Assumed working | Porchy | ZIP | ||
Unlocked | PAL20L8 | IC39 | CPU2 | Assumed working | Porchy | ZIP |
Equations
CPU1 Equations
/** Inputs **/ Pin 1 = i1; Pin 2 = i2; Pin 3 = i3; Pin 4 = i4; Pin 5 = i5; Pin 6 = i6; Pin 7 = i7; Pin 8 = i8; Pin 9 = i9; Pin 10 = i10; Pin 11 = i11; Pin 13 = i13; /** Outputs **/ Pin 15 = o15; /**(Combinatorial, Output feedback output, Active low) **/ Pin 16 = o16; /**(Combinatorial, Output feedback output, Active low) **/ Pin 17 = o17; /**(Combinatorial, Output feedback output, Active low) **/ Pin 18 = o18; /**(Combinatorial, Output feedback output, Active low) **/ Pin 19 = o19; /**(Combinatorial, Output feedback output, Active low) **/ Pin 20 = o20; /**(Combinatorial, Output feedback output, Active low) **/ Pin 21 = o21; /**(Combinatorial, Output feedback output, Active low) **/ Pin 22 = o22; /**(Combinatorial, Output feedback output, Active low) **/ Pin 23 = o23; /**(Combinatorial, No output feedback, Active low) **/ /** Equations **/ !o15 = i3 & !i4 & !i5 & !i6 & !i7 & !i9 & !i10 & i11 # i3 & !i4 & !i5 & !i6 & !i7 & !i9 & i10 & !i11; !o16 = i3 & !i4 & !i5 & !i6 & !i7 & !i8 & !i10 & i11 # i3 & !i4 & !i5 & !i6 & !i7 & !i8 & i10 & !i11; !o17 = !i1 & !i2 & i3 & i4 & !i5 & !i6 & !i7 & !i10 & i11 # !i1 & !i2 & i3 & i4 & !i5 & !i6 & !i7 & i10 & !i11; !o18 = !i1 & !i2 & !i3 & i4 & !i5 & !i6 & !i7 & !i10 & i11 # !i1 & !i2 & !i3 & i4 & !i5 & !i6 & !i7 & i10 & !i11; !o19 = !i1 & !i2 & i3 & !i4 & i5 & !i6 & !i7 & !i10 & i11 # !i1 & !i2 & i3 & !i4 & i5 & !i6 & !i7 & i10 & !i11; !o20 = !i3 & !i4 & i5 & !i6 & !i7 & !i10 & i11 # !i3 & !i4 & i5 & !i6 & !i7 & i10 & !i11; !o21 = i1 & !i2 & !i3 & !i4 & !i5 & !i6 & !i10 & i11 # i1 & !i2 & !i3 & !i4 & !i5 & !i6 & i10 & !i11; !o22 = !i1 & !i2 & !i3 & !i4 & !i5 & !i6 & !i10 & i11 # !i1 & !i2 & !i3 & !i4 & !i5 & !i6 & i10 & !i11; !o23 = !i7 & i10 & i11 & i13;
CPU2 Equations
/** Inputs **/ Pin 1 = i1; Pin 2 = i2; Pin 3 = i3; Pin 4 = i4; Pin 5 = i5; Pin 6 = i6; Pin 7 = i7; Pin 8 = i8; Pin 9 = i9; Pin 10 = i10; Pin 11 = i11; Pin 13 = i13; Pin 14 = i14; Pin 23 = i23; /** Outputs **/ Pin 15 = o15; /**(Combinatorial, No output feedback, Active low) **/ Pin 16 = o16; /**(Combinatorial, Output feedback output, Active low) **/ Pin 17 = o17; /**(Combinatorial, Output feedback output, Active low) **/ Pin 18 = o18; /**(Combinatorial, Output feedback output, Active low) **/ Pin 19 = o19; /**(Combinatorial, Output feedback output, Active low) **/ Pin 20 = o20; /**(Combinatorial, Output feedback output, Active low) **/ Pin 21 = o21; /**(Combinatorial, Output feedback output, Active low) **/ Pin 22 = o22; /**(Combinatorial, No output feedback, Active low) **/ /** Equations **/ !o15 = !i4 & !i10 & !i14; !o16 = i14 # i4 # i10 & i11; !o17 = i14; !o18 = !i14; !o19 = !i4 & !i11 & !i14; !o20 = !i5 # !i6 # !i1 # !i2; !o21 = i4; !o22 = !o20 # !i13 # !i8 # !i7 # !i4;