Fantasy Land

PCB

• 

PLD

PLD Information				Credits		Download	Pictures
Dump Method	Target Device	Location	Status	Creator(s)	Tester(s)	Files	View
Unlocked	GAL20V8	PAL17 D8	Tested	Caius	Caius	JEDEC

Equations

PAL17 Equations

/** Inputs **/
Pin	1 = i1;
Pin	2 = i2;
Pin	3 = i3;
Pin	4 = i4;
Pin	5 = i5;
Pin	6 = i6;
Pin	7 = i7;
Pin	8 = i8;
Pin	9 = i9;
Pin	10 = i10;
Pin	11 = i11;
Pin	13 = i13;
Pin	14 = i14;
Pin	16 = i16;
Pin	17 = i17;
Pin	18 = i18;
Pin	23 = i23;

/** Outputs **/
Pin	15 = o15; /**(Combinatorial, No output feedback, Active low) **/
Pin	19 = o19; /**(Combinatorial, Output feedback output, Active high) **/
Pin	20 = o20; /**(Combinatorial, Output feedback output, Active low) **/
Pin	21 = o21; /**(Combinatorial, Output feedback output, Active low) **/
Pin	22 = o22; /**(Combinatorial, No output feedback, Active low) **/

/** Equations **/

!o15 = !i13 & i18 & !i23
     # !i7 & !i18 & !i23
     # !i2 & i23;

o19 = !i17 & i18 & !i23
    # !i10 & !i18 & !i23
    # !i5 & i23;

!o20 = !i16 & i18 & !i23
     # !i9 & !i18 & !i23
     # !i4 & i23;

!o21 = !i14 & i18 & !i23
     # !i8 & !i18 & !i23
     # !i3 & i23;

!o22 = !i11 & i18 & !i23
     # !i6 & !i18 & !i23
     # !i1 & i23;

Credits

• PCB and PLD pictures from Caius