Difference between revisions of "Dynamite Dux (bootleg)"
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File:Dynamite Dux bootleg bottom PCB.JPG | File:Dynamite Dux bootleg bottom PCB.JPG | ||
</gallery> | </gallery> | ||
== PLD's == | == PLD's == | ||
{ | {{PLD_NO_ID}} | ||
|- | |- | ||
|Bruteforced | |Bruteforced | ||
|GAL20V8 | |[[GAL20V8]] | ||
GAL22V10 | [[GAL22V10]] | ||
|U13 (CPU PCB) | |U13 (CPU PCB) | ||
|Tested | |Tested | ||
|Caius | |[[Caius]] | ||
|Caius | |[[Caius]] | ||
|[https://wiki.pldarchive.co.uk/pals/DynamiteDux_bootleg_U13_GAL20V8.jed JEDEC] | |[https://wiki.pldarchive.co.uk/pals/DynamiteDux_bootleg_U13_GAL20V8.jed JEDEC] | ||
[https://wiki.pldarchive.co.uk/pals/DynamiteDux_bootleg_U13_GAL22V10.jed JEDEC] | [https://wiki.pldarchive.co.uk/pals/DynamiteDux_bootleg_U13_GAL22V10.jed JEDEC] | ||
|- | |- | ||
|Bruteforced | |Bruteforced | ||
|GAL16V8 | |[[GAL16V8]] | ||
|U50 (CPU PCB) | |U50 (CPU PCB) | ||
|Tested | |Tested | ||
|Caius | |[[Caius]] | ||
|Caius | |[[Caius]] | ||
|[https://wiki.pldarchive.co.uk/pals/DynamiteDux_bootleg_U50.jed JEDEC] | |[https://wiki.pldarchive.co.uk/pals/DynamiteDux_bootleg_U50.jed JEDEC] | ||
|- | |- | ||
|Unlocked | |Unlocked | ||
|GAL16V8 | |[[GAL16V8]] | ||
|A18 (Video PCB) | |A18 (Video PCB) | ||
|Assumed working | |Assumed working | ||
|ClawGrip | |[[ClawGrip]] | ||
| | | | ||
|[https://wiki.pldarchive.co.uk/pals/DynamiteDux_bootleg_A18 JEDEC] | |[https://wiki.pldarchive.co.uk/pals/DynamiteDux_bootleg_A18 JEDEC] | ||
|} | |} | ||
== Credits == | |||
*PCB pictures provided by [[Caius]] & [[ClawGrip]] |
Revision as of 14:07, 7 May 2022
PCB
PLD's
PLD Information | Credits | Download | View | ||||
---|---|---|---|---|---|---|---|
Dump Method | Target Device(s) | Location | Status | Creator(s) | Tester(s) | Files | Pictures |
Bruteforced | GAL20V8 | U13 (CPU PCB) | Tested | Caius | Caius | JEDEC | |
Bruteforced | GAL16V8 | U50 (CPU PCB) | Tested | Caius | Caius | JEDEC | |
Unlocked | GAL16V8 | A18 (Video PCB) | Assumed working | ClawGrip | JEDEC |