Difference between revisions of "Amstrad 6128"
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|Recreated | |Recreated | ||
|GAL16V8 | |[[GAL16V8]] | ||
|IC118 | |IC118 | ||
|40031 | |40031 | ||
|Tested | |Tested | ||
|Porchy, Arnoldemu | |[[Porchy]], [[Arnoldemu]] | ||
|Porchy, Bryce | |[[Porchy]], [[Bryce]] | ||
|[https://wiki.pldarchive.co.uk/pals/Amstrad6128.zip ZIP] | |[https://wiki.pldarchive.co.uk/pals/Amstrad6128.zip ZIP] | ||
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Revision as of 14:28, 7 May 2022
PLD
PLD Information | Credits | Download | View | |||||
---|---|---|---|---|---|---|---|---|
Dump Method | Target Device | Location | ID | Status | Creator(s) | Tester(s) | Files | Pictures |
Recreated | GAL16V8 | IC118 | 40031 | Tested | Porchy, Arnoldemu | Porchy, Bryce | ZIP |
Schematic
Notes
Manually recreated by Porchy using logic analyser. This chip makes heavy use of latches in order to implement memory bank switching.