Difference between revisions of "Amstrad 6128"
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== Schematic == | == Schematic == | ||
[[File: | [[File:Amstrad_CPC6128_Schematic.png|500px]] | ||
== Notes == | |||
<pre> | |||
Manually recreated by Porchy using logic analyser. This chip makes heavy use of latches in order to implement memory bank switching. | Manually recreated by Porchy using logic analyser. This chip makes heavy use of latches in order to implement memory bank switching. | ||
</pre> | |||
Revision as of 12:49, 19 February 2021
| PLD Information | Credits | Download | View | |||||
|---|---|---|---|---|---|---|---|---|
| Dump Method | Target Device | Location | ID | Status | Creator(s) | Tester(s) | Files | Pictures |
| Recreated | GAL16V8 | IC118 | 40031 | Tested | Porchy, Arnoldemu | Porchy, Bryce | JEDEC | |
Schematic
Notes
Manually recreated by Porchy using logic analyser. This chip makes heavy use of latches in order to implement memory bank switching.
