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== Equations ==
== Equations ==
<pre>
<pre>
H0=2 H1=3 H2=4 H3=5 H4=6 H5=7 DMAEND=8 HC=9
/** Inputs **/
VB1L=12 FLP=13 HB=14 HSYNC=15 DMAON=16 CPU=17 FIX=18 HLD=19
Pin 2 = i2;
Pin 3 = i3;
Pin 4 = i4;
Pin 5 = i5;
Pin 6 = i6;
Pin 7 = i7;
Pin 8 = i8;
Pin 9 = i9;


equations
/** Outputs **/
/HB := H0 * H1 * H2 * H3 * H4 * H5 * /HC * HLD * FLP
Pin 12 = o12; /**(Registered, Output feedback registered, Active low) **/
    + /H0 * /H1 * /H2 * /H3 * /H4 * /H5 * /HC * HLD * /FLP
Pin 13 = o13; /**(Registered, Output feedback registered, Active low) **/
    + HC * /HB
Pin 14 = o14; /**(Registered, Output feedback registered, Active low) **/
Pin 15 = o15; /**(Registered, Output feedback registered, Active low) **/
Pin 16 = o16; /**(Registered, Output feedback registered, Active low) **/
Pin 17 = o17; /**(Registered, Output feedback registered, Active low) **/
Pin 18 = o18; /**(Registered, Output feedback registered, Active low) **/
Pin 19 = o19; /**(Registered, Output feedback registered, Active low) **/


/HSYNC := /H0 * H1 * /H2 * H3 * /H4 * /H5 * HB * FLP
/** Equations **/
        + /H5 * /HSYNC * FLP
        + /H1 * H5 * /HSYNC * FLP
        + H0 * /H1 * H2 * /H3 * H4 * H5 * HB * /FLP
        + H5 * /HSYNC * /FLP
        + H1 * H4 * /HSYNC * /FLP


/DMAON := /H0 * /H1 * /H2 * /H3 * /H4 * /H5 * HB * /DMAEND * FLP
!o12.d = ;
        + H0 * H1 * H2 * H3 * H4 * H5 * HB * /DMAEND * /FLP
o12.oe = OE;
        + /DMAEND * /DMAON


/CPU := H1 * /H2 * FLP
!o13.d = !i9 & !o14;
      + /H1 * H2 * /FLP
o13.oe = OE;


FIX = H0 * H1 * H2 * FLP
!o14.d = !i9 & o14
    + /H0 * /H1 * /H2 * /FLP
        # o13 & !o14;
o14.oe = OE;


/HLD = /HC * /HB
!o15.d = i3 & !i4 & i5 & !i6 & !i7 & o14 & o19
        # i4 & i5 & !i6 & !i7 & o14 & o19
        # i6 & !i7 & o14 & o19
        # !i3 & !i4 & !i5 & !i6 & i7 & o14 & o19
        # !i3 & i4 & !i5 & i6 & i7 & o14 & !o19
        # !i4 & !i5 & i6 & i7 & o14 & !o19
        # !i6 & i7 & o14 & !o19
        # i3 & i4 & i5 & i6 & !i7 & o14 & !o19;
o15.oe = OE;
 
!o16.d =  !i2 & !i3 & !i4 & !i5 & !i6 & !i7 & o12 & o14 & o19
        # i2 & i3 & i4 & i5 & i6 & i7 & o12 & o14 & !o19
        # !i8 & !o16;
o16.oe = OE;
 
!o17.d =  i2 & i3 & i4 & !i5 & i6 & i7 & o14
        # i2 & i3 & i4 & i5 & i6 & !i7 & o14;
o17.oe = OE;
 
!o18.d =  !i4 & o19
        # !i3 & o19
        # !i2 & i3 & i4 & o19
        # i4 & !o19
        # i3 & !o19
        # i2 & !i3 & !i4 & !o19;
o18.oe = OE;
 
!o19.d =  ;
o19.oe = OE;
</pre>
</pre>


[[Category:SEGA PLD's]]
[[Category:SEGA PLD's]]

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