PCB
PLD's
Notes
There are a lot of different versions of the GAL-based boards. GALs with the same ID are interchangeable between board revisions.
IDs always seem to start with "25-". The next four digits are the actual ID.
The fifths digit and any extra letters/digits that follow only seem to indicate the set of GALs to be used for the specific board version.
From what I was able to verify content of the GALs is identical as long as the four ID digits are the same across board versions.
Chip speed is critical and has to match the original values. Faster chips don't work for all locations.
Turbo 040 ASIC
PLD Information | Credits | Download | View | |||||
---|---|---|---|---|---|---|---|---|
Dump Method | Target Device | Location | ID | Status | Creator(s) | Tester(s) | Files | Pictures |
Unlocked | GAL20V8 | U10 | 25-29813 | Tested | Bolle | Bolle | JEDEC | |
Unlocked | GAL20V8 | U12 | 25-29820 | Tested | Bolle | Bolle | JEDEC | |
Unlocked | GAL16V8 | U23 | 25-29288 | Tested | Bolle | Bolle | JEDEC |
Turbo 040 25MHz (early version)
PLD Information | Credits | Download | View | |||||
---|---|---|---|---|---|---|---|---|
Dump Method | Target Device | Location | ID | Status | Creator(s) | Tester(s) | Files | Pictures |
Undumped | GAL22V10 | U4 | 25-2915? | |||||
Glitched | GAL20V8 | U5 | 25-23613 | Assumed working | Bolle | JEDEC | ||
Glitched | GAL20V8 | U6 | 25-24009 | Assumed working | Bolle | JEDEC | ||
Glitched | GAL20V8 | U7 | 25-24115 | Assumed working | Bolle | JEDEC | ||
Glitched | GAL20V8 | U8 | 25-24511 | Assumed working | Bolle | JEDEC | ||
Glitched | GAL20V8 | U9 | 25-29288 | Assumed working | Bolle | JEDEC | ||
Undumped | GAL22V10 | U10 | 25-2906? | |||||
Glitched | GAL20V8 | U11 | 25-23705 | Assumed working | Bolle | JEDEC | ||
Glitched | GAL20V8 | U14 | 25-29288 | Assumed working | Bolle | JEDEC | ||
Glitched | GAL22V10 | U15 | 25-23903 | Assumed working | Bolle | ZIP | ||
Glitched | GAL20V8 | U16 | 25-24801 | Assumed working | Bolle | JEDEC | ||
Glitched | GAL20V8 | U17 | 25-24702 | Assumed working | Bolle | JEDEC |
Turbo 040 40MHz GAL-based early version
PLD Information | Credits | Download | View | |||||
---|---|---|---|---|---|---|---|---|
Dump Method | Target Device | Location | ID | Status | Creator(s) | Tester(s) | Files | Pictures |
Undumped | GAL22V10 | U4 | 25-2939? | |||||
Glitched | GAL20V8 | U5 | 25-2911x | Assumed working | Bolle | ZIP | ||
Glitched | GAL20V8 | U6 | 25-2913x | Assumed working | Bolle | ZIP | ||
Glitched | GAL20V8 | U7 | 25-24115 | Assumed working | Bolle | ZIP | ||
Glitched | GAL20V8 | U8 | 25-2950? | Assumed working | Bolle | ZIP | ||
Glitched | GAL20V8 | U9 | 25-23804 | Assumed working | Bolle | ZIP | ||
Glitched | GAL20V8 | U10 | 25-24412 | Assumed working | Bolle | ZIP | ||
Glitched | GAL20V8 | U11 | 25-2912x | Assumed working | Bolle | ZIP | ||
Glitched | GAL20V8 | U14 | 25-2920x | Assumed working | Bolle | ZIP | ||
Glitched | GAL22V10 | U15 | 25-23903 | Assumed working | Bolle | ZIP | ||
Glitched | GAL20V8 | U16 | 25-24801 | Assumed working | Bolle | ZIP | ||
Glitched | GAL20V8 | U17 | 25-24702 | Assumed working | Bolle | ZIP |
Turbo 040 40MHz GAL-based latest version
PLD Information | Credits | Download | View | |||||
---|---|---|---|---|---|---|---|---|
Dump Method | Target Device | Location | ID | Status | Creator(s) | Tester(s) | Files | Pictures |
Undumped | GAL22V10 | U4 | 25-29391 | |||||
Glitched | GAL20V8 | U5 | 25-29110 | Assumed working | Bolle | ZIP | ||
Glitched | GAL20V8 | U6 | 25-2932x | Assumed working | Bolle | ZIP | ||
Glitched | GAL20V8 | U7 | 25-24115 | Assumed working | Bolle | ZIP | ||
Glitched | GAL20V8 | U8 | 25-29509 | Assumed working | Bolle | ZIP | ||
Glitched | GAL20V8 | U9 | 25-23804 | Assumed working | Bolle | ZIP | ||
Glitched | GAL20V8 | U10 | 25-24412 | Assumed working | Bolle | ZIP | ||
Glitched | GAL20V8 | U11 | 25-2912x | Assumed working | Bolle | ZIP | ||
Glitched | GAL20V8 | U14 | 25-29202 | Assumed working | Bolle | ZIP | ||
Glitched | GAL22V10 | U15 | 25-23903 | Assumed working | Bolle | ZIP | ||
Glitched | GAL20V8 | U16 | 25-24801 | Assumed working | Bolle | ZIP | ||
Glitched | GAL20V8 | U17 | 25-24702 | Assumed working | Bolle | ZIP | ||
Glitched | GAL16V8 | U38 | 25-29417 | Assumed working | Bolle | ZIP |
Turbo 040 Cache Daughterboard
PLD Information | Credits | Download | View | |||||
---|---|---|---|---|---|---|---|---|
Dump Method | Target Device | Location | ID | Status | Creator(s) | Tester(s) | Files | Pictures |
Unlocked | PAL16L8 | U1 | 25-28205 | Assumed working | Bolle | ZIP | ||
Glitched | GAL20V8 | U2 | 25-2831x | Assumed working | Bolle | ZIP | ||
Glitched | GAL20V8 | U3 | 25-2843x | Assumed working | Bolle | ZIP | ||
Glitched | GAL20V8 | U4 | 25-2840x | Assumed working | Bolle | ZIP |