(→PLD's) |
(→PLD's) |
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|[[File:SquashV1-F2.JPG|100px]] | |[[File:SquashV1-F2.JPG|100px]] | ||
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{{GALECO_D21}} | |||
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|Unlocked | |Unlocked | ||
Revision as of 17:16, 25 November 2023
PCB
PLD's
| PLD Information | Credits | Download | View | |||||
|---|---|---|---|---|---|---|---|---|
| Dump Method | Target Device | Location | Status | Creator(s) | Tester(s) | Files | Pictures | Equations |
| Unlocked | GAL16V8 | F2 | Tested | Caius | Caius | JEDEC | 
|
|
| Unlocked | GAL20V8 | D21 | Tested | Caius | Caius, Aurélien | ZIP | 
|
Show |
| Unlocked | GAL20V8 | D21 | Tested | Caius | Caius | JEDEC | 
|
Show |
| Unlocked | GAL20V8 | H11 | Tested | Caius | Caius | ZIP | 
|
|
Credits
- PCB and IC pictures from Caius