(→PLD) |
|||
Line 16: | Line 16: | ||
|[[Bolle]] | |[[Bolle]] | ||
| | | | ||
|[https://wiki.pldarchive.co.uk/pals/ATTO_Silicon_Express_U6 | |[https://wiki.pldarchive.co.uk/pals/ATTO_Silicon_Express_U6.zip ZIP] | ||
| | | | ||
|- | |- | ||
Line 26: | Line 26: | ||
|[[Bolle]] | |[[Bolle]] | ||
| | | | ||
|[https://wiki.pldarchive.co.uk/pals/ATTO_Silicon_Express_U9 | |[https://wiki.pldarchive.co.uk/pals/ATTO_Silicon_Express_U9.zip ZIP] | ||
| | | | ||
|- | |- | ||
Line 36: | Line 36: | ||
|[[Bolle]] | |[[Bolle]] | ||
| | | | ||
|[https://wiki.pldarchive.co.uk/pals/ATTO_Silicon_Express_U10 | |[https://wiki.pldarchive.co.uk/pals/ATTO_Silicon_Express_U10.zip ZIP] | ||
| | | | ||
|} | |} |
Latest revision as of 18:45, 9 May 2024
PCB[edit]
PLD[edit]
PLD Information | Credits | Download | View | |||||
---|---|---|---|---|---|---|---|---|
Dump Method | Target Device | Location | ID | Status | Creator(s) | Tester(s) | Files | Pictures |
Glitched | GAL20V8 | U6 | M5F 07-PAL-00100 | Assumed working | Bolle | ZIP | ||
Glitched | GAL20V8 | U9 | M5F 07-PAL-00300 | Assumed working | Bolle | ZIP | ||
Glitched | GAL20V8 | U10 | M5F 07-PAL-00201 | Assumed working | Bolle | ZIP |
Credits[edit]
- PCB picture from Bolle