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== Credits == | == Credits == | ||
*PCB pictures from [[Kevin Eshbach]] | *PCB pictures from [[Kevin Eshbach]] | ||
[[Category:Bootleg]] | |||
Revision as of 19:24, 15 July 2022
PCB's
_(Complete).JPG)
_(Main_-_Parts_Side).JPG)
_(Main_-_Solder_Side).JPG)
_(Daughterboard_-_Solder_Side).JPG)
_(Daughterboard_-_Parts_Side).JPG)
PLD's
| PLD Information | Credits | Download | View | ||||
|---|---|---|---|---|---|---|---|
| Dump Method | Target Device(s) | Location | Status | Creator(s) | Tester(s) | Files | Pictures |
| Bruteforced | PAL16L2 | U0-0 | Tested | Kevin Eshbach | JEDEC | ||
| Bruteforced | PAL16L2 | U0-1 | Tested | Kevin Eshbach | JEDEC | ||
| Bruteforced | PAL16L2 | U1-0 | Tested | Kevin Eshbach | JEDEC | ||
| Bruteforced | PAL16L2 | U1-1 | Tested | Kevin Eshbach | JEDEC | ||
| Bruteforced | PAL12L6 | U2 | Tested | Kevin Eshbach | JEDEC | ||
| Bruteforced | PAL12L6 | U3 | Tested | Kevin Eshbach | JEDEC | ||
Credits
- PCB pictures from Kevin Eshbach